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| author | Craig Topper <craig.topper@sifive.com> | 2023-02-27 09:19:27 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2023-02-27 09:19:27 -0800 |
| commit | 2e7311170201e07e5e067e397aed8fa482d2fb8b (patch) | |
| tree | 206e85f381f22c628698b3e9167ed8bd2d8deb8a /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | 7d7633bdf489eff66a56984a4cf3d6a21cf36f2b (diff) | |
| download | llvm-2e7311170201e07e5e067e397aed8fa482d2fb8b.zip llvm-2e7311170201e07e5e067e397aed8fa482d2fb8b.tar.gz llvm-2e7311170201e07e5e067e397aed8fa482d2fb8b.tar.bz2 | |
[Sema] Use isSVESizelessBuiltinType instead of isSizelessBuiltinType to prevent crashing on RISC-V.
These 2 spots are protecting calls to SVE specific functions. If RISC-V
sizeless types end up in there we trigger assertions.
Use the more specific isSVESizelessBuiltinType() to avoid letting
RISC-V vectors through.
Reviewed By: asb, c-rhodes
Differential Revision: https://reviews.llvm.org/D144772
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions