diff options
| author | chenglin.bi <chenglin.bi@cixcomputing.com> | 2022-06-14 11:06:10 +0800 |
|---|---|---|
| committer | chenglin.bi <chenglin.bi@cixcomputing.com> | 2022-06-14 11:06:10 +0800 |
| commit | 286198ff043afa7626705fb69c3e9b8873193573 (patch) | |
| tree | 87ff6e5dddf3d2551c58275609f2d4888bbfecba /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | e99c07a30e2d8d5010bffdfdc14903c93a8e132d (diff) | |
| download | llvm-286198ff043afa7626705fb69c3e9b8873193573.zip llvm-286198ff043afa7626705fb69c3e9b8873193573.tar.gz llvm-286198ff043afa7626705fb69c3e9b8873193573.tar.bz2 | |
[InstCombine] Optimize lshr+shl+and conversion pattern
if `C1` and `C3` are pow2 and `Log2(C3) >= C2`:
((C1 >> X) << C2) & C3 -> X == (Log2(C1)+C2-Log2(C3)) ? C3 : 0
https://alive2.llvm.org/ce/z/zvrkKF
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D127469
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions