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| author | Craig Topper <craig.topper@sifive.com> | 2021-08-26 09:33:53 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2021-08-26 10:20:19 -0700 |
| commit | 1b9417454eda38f27048f9665aedcb6158ce8e9f (patch) | |
| tree | 6883066662d233dee97122d29ea60ffe6fb3b990 /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | abb956370ee71d018e9a88ae196f039f6c4e0dae (diff) | |
| download | llvm-1b9417454eda38f27048f9665aedcb6158ce8e9f.zip llvm-1b9417454eda38f27048f9665aedcb6158ce8e9f.tar.gz llvm-1b9417454eda38f27048f9665aedcb6158ce8e9f.tar.bz2 | |
[RISCV] Insert a sext_inreg when type legalizing i32 shl by constant on RV64.
Similar to what we do for add/sub/mul.
This can help remove some sext.w. There are some regressions on
some bswap tests, but I have an idea how to fix that for a follow up.
A new PACKW pattern is added to handle the new sext_inreg placement.
Differential Revision: https://reviews.llvm.org/D108663
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions