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| author | Alexandros Lamprineas <alexandros.lamprineas@arm.com> | 2021-05-14 09:37:44 +0100 |
|---|---|---|
| committer | Alexandros Lamprineas <alexandros.lamprineas@arm.com> | 2021-05-14 10:05:37 +0100 |
| commit | 10798709713a9b5d4ff8d8f5961b3c2fdb81d887 (patch) | |
| tree | 3560608d5fdd54adeef9519bbb059f80df392e26 /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | c12c8124e14217779eb5b8d3a2a92a6469a799e7 (diff) | |
| download | llvm-10798709713a9b5d4ff8d8f5961b3c2fdb81d887.zip llvm-10798709713a9b5d4ff8d8f5961b3c2fdb81d887.tar.gz llvm-10798709713a9b5d4ff8d8f5961b3c2fdb81d887.tar.bz2 | |
[llvm-mc][AArch64] HINT instruction disassembled as BTI
The Arm Architecture Reference Manual says that the SystemHintOp_BTI
opcode is prefered when CRm:op2 matches 0100:xx0, but llvm-mc
currently accepts 0100:xxx, which isn't right.
Differential Revision: https://reviews.llvm.org/D102415
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions