aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
diff options
context:
space:
mode:
authorDavid Green <david.green@arm.com>2023-02-27 19:20:10 +0000
committerDavid Green <david.green@arm.com>2023-02-27 19:20:10 +0000
commit06daa515b27029885826833a5626937355abc4a1 (patch)
treed988d44477bdcc7fd30c4e6761d5a8e84d1e070f /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
parente7b52c46bf31858ad3754a853977ea7da431577e (diff)
downloadllvm-06daa515b27029885826833a5626937355abc4a1.zip
llvm-06daa515b27029885826833a5626937355abc4a1.tar.gz
llvm-06daa515b27029885826833a5626937355abc4a1.tar.bz2
[AArch64] Don't remove free sext_inreg(vector_extract(x)) if it leads to multiple extracts
If we have sext_inreg(vector_extract(x)) but the top bits are not used, DAG will try to remove the sext_inreg, using vector_extract(x) directly. This can lead to multiple uses of both sext_inreg(vector_extract(x)) and vector_extract(x), leading to the generation of both umov and smov extracts. This adds a target hook to prevent that under AArch64 where the sext_inreg can be considered free if there are multiple uses of the sext and no uses of the vector_extract. This helps fix a small regression from D144550. Differential Revision: https://reviews.llvm.org/D144850
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions