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| author | Craig Topper <craig.topper@sifive.com> | 2024-08-23 09:37:48 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2024-08-23 09:37:48 -0700 |
| commit | 0381e01424692a746b941e470c4cc44f6f0bf258 (patch) | |
| tree | 31faf4d78597bd57137596cab0878e8eb0d07364 /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | fd7904a07bc26950fa7735fb6871a064e3ebc836 (diff) | |
| download | llvm-0381e01424692a746b941e470c4cc44f6f0bf258.zip llvm-0381e01424692a746b941e470c4cc44f6f0bf258.tar.gz llvm-0381e01424692a746b941e470c4cc44f6f0bf258.tar.bz2 | |
Recommit "[RISCV] Add isel optimization for (and (sra y, c2), c1) to recover regression from #101751. (#104114)"
Fixed an incorrect cast.
Original message:
If c1 is a shifted mask with c3 leading zeros and c4 trailing zeros. If
c2 is greater than c3, we can use (srli (srai y, c2 - c3), c3 + c4)
followed by a SHXADD with c4 as the X amount.
Without Zba we can use (slli (srli (srai y, c2 - c3), c3 + c4), c4).
Alive2: https://alive2.llvm.org/ce/z/AwhheR
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions