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| author | Kit Barton <kbarton@ca.ibm.com> | 2020-08-17 15:33:47 -0500 |
|---|---|---|
| committer | Kit Barton <kbarton@ca.ibm.com> | 2020-09-10 11:58:01 -0500 |
| commit | 009cd4e491033f57f547a7bda63e35b50a6e5cf7 (patch) | |
| tree | db307f365d7b6ad3e819ddd0c801056f632816ef /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | be7cef789e75a354831d528ecc76b325f0f5da68 (diff) | |
| download | llvm-009cd4e491033f57f547a7bda63e35b50a6e5cf7.zip llvm-009cd4e491033f57f547a7bda63e35b50a6e5cf7.tar.gz llvm-009cd4e491033f57f547a7bda63e35b50a6e5cf7.tar.bz2 | |
[PPC][GlobalISel] Add initial GlobalIsel infrastructure
This adds the initial GlobalISel skeleton for PowerPC. It can only run
ir-translator and legalizer for `ret void`.
This is largely based on the initial GlobalISel patch for RISCV
(https://reviews.llvm.org/D65219).
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D83100
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
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