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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-05-16 20:56:47 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-05-16 20:56:47 +0000 |
| commit | c721a23882c3a0a9e3907b16ade6983e1e78c9b3 (patch) | |
| tree | a75ce634358acd8ec819e450ff36137502ed921f /llvm/lib/Bitcode/Reader | |
| parent | 0e70de57a3c80aea5f9018c6ddf0219293f4665e (diff) | |
| download | llvm-c721a23882c3a0a9e3907b16ade6983e1e78c9b3.zip llvm-c721a23882c3a0a9e3907b16ade6983e1e78c9b3.tar.gz llvm-c721a23882c3a0a9e3907b16ade6983e1e78c9b3.tar.bz2 | |
R600/SI: Refactor the VOP3_32 tablegen class
This will allow us to use a single MachineInstr to represent
instructions which behave the same but have different encodings
on some subtargets.
llvm-svn: 209028
Diffstat (limited to 'llvm/lib/Bitcode/Reader')
0 files changed, 0 insertions, 0 deletions