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author | Heejin Ahn <aheejin@gmail.com> | 2018-08-14 19:03:36 +0000 |
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committer | Heejin Ahn <aheejin@gmail.com> | 2018-08-14 19:03:36 +0000 |
commit | c9c711a0acc9794470b059f94ea09ac70677e295 (patch) | |
tree | 07863169ad9e9ab959eaa0f31ddd2168ba97954a /llvm/lib/Bitcode/Reader/MetadataLoader.cpp | |
parent | a1e55d252e8415df4670b4b630d5671c745bb84e (diff) | |
download | llvm-c9c711a0acc9794470b059f94ea09ac70677e295.zip llvm-c9c711a0acc9794470b059f94ea09ac70677e295.tar.gz llvm-c9c711a0acc9794470b059f94ea09ac70677e295.tar.bz2 |
[WebAssembly] Fix encoding of non-SIMD vector-typed instructions
Previously SIMD_I was the same as a normal instruction except for the
addition of a HasSIM128 predicate. However, rL339186 changed the
encoding of SIMD_I instructions to automatically contain the SIMD
prefix byte. This broke the encoding of non-SIMD vector-typed
instructions, which had instantiated SIMD_I. This CL corrects this
error.
Reviewers: aheejin
Subscribers: sunfish, jgravelle-google, sbc100, llvm-commits
Differential Revision: https://reviews.llvm.org/D50682
Patch by Thomas Lively (tlively)
llvm-svn: 339710
Diffstat (limited to 'llvm/lib/Bitcode/Reader/MetadataLoader.cpp')
0 files changed, 0 insertions, 0 deletions