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| author | Kit Barton <kbarton@ca.ibm.com> | 2017-02-01 14:33:57 +0000 |
|---|---|---|
| committer | Kit Barton <kbarton@ca.ibm.com> | 2017-02-01 14:33:57 +0000 |
| commit | d26978796ed84af4d32aa6dae86d6d327eef74e2 (patch) | |
| tree | 3d41f74450ba5b2e8b97fe842950c07eacf47d40 /llvm/lib/Bitcode/Reader/BitstreamReader.cpp | |
| parent | 816ae4b0dfac9a2bd964e8c4dae6dd7183ceb92a (diff) | |
| download | llvm-d26978796ed84af4d32aa6dae86d6d327eef74e2.zip llvm-d26978796ed84af4d32aa6dae86d6d327eef74e2.tar.gz llvm-d26978796ed84af4d32aa6dae86d6d327eef74e2.tar.bz2 | |
[PowerPC] Fix sjlj pseduo instructions to use G8RC_NOX0 register class
The the following instructions:
- LD/LWZ (expanded from sjLj pseudo-instructions)
- LXVL/LXVLL vector loads
- STXVL/STXVLL vector stores
all require G8RC_NO0X class registers for RA.
Differential Revision: https://reviews.llvm.org/D29289
Committed for Lei Huang
llvm-svn: 293769
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitstreamReader.cpp')
0 files changed, 0 insertions, 0 deletions