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| author | Craig Topper <craig.topper@sifive.com> | 2020-11-25 15:07:34 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2020-11-25 15:07:34 -0800 |
| commit | ed95cafbc5fa9efbfe3f38da0b17efdb3806598c (patch) | |
| tree | 2989028923c57dd4aab18f5a494c8951e0a7df26 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 2d6042937b04eef00672b5c4ce623bf8f7b9a201 (diff) | |
| download | llvm-ed95cafbc5fa9efbfe3f38da0b17efdb3806598c.zip llvm-ed95cafbc5fa9efbfe3f38da0b17efdb3806598c.tar.gz llvm-ed95cafbc5fa9efbfe3f38da0b17efdb3806598c.tar.bz2 | |
[RISCV] Add an implementation of isFMAFasterThanFMulAndFAdd
Start with an assumption that FMA is faster than Fmul+FAdd. If thats not true
on some particular implementation we can add a tuning parameter in the future.
I've update the fmuladd test cases and added new test cases for fast math flag
based contraction.
Differential Revision: https://reviews.llvm.org/D91987
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
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