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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-07-15 19:46:48 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-07-15 19:46:48 +0000 |
| commit | e1b52f418033548601a7839cbbb8ceddc0751521 (patch) | |
| tree | 0e03ebc5729cf5555d9fab35fa7208bf6b65f3f5 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 3bfdb54d88d71b8cd8594d22d4b3712ee5661aa5 (diff) | |
| download | llvm-e1b52f418033548601a7839cbbb8ceddc0751521.zip llvm-e1b52f418033548601a7839cbbb8ceddc0751521.tar.gz llvm-e1b52f418033548601a7839cbbb8ceddc0751521.tar.bz2 | |
AMDGPU/GlobalISel: Fix selecting vcc->vcc bank copies
The extra test change is correct, although how it arrives there is a
bug that needs work. With wave32, the test for isVCC ambiguously
reports true for an SCC or VCC source. A new allocatable pseudo
register class for SCC may be necesssary.
llvm-svn: 366119
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions