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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-05-15 14:54:51 -0400 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-05-28 10:04:02 -0400 |
| commit | d6671ee90c1423eb18c6fab11819df850ae2200d (patch) | |
| tree | 9a859b8221959708c541f06da461539319cd24dc /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 0da4353938368c1f2473cd24553989f84b964279 (diff) | |
| download | llvm-d6671ee90c1423eb18c6fab11819df850ae2200d.zip llvm-d6671ee90c1423eb18c6fab11819df850ae2200d.tar.gz llvm-d6671ee90c1423eb18c6fab11819df850ae2200d.tar.bz2 | |
InferAddressSpaces: Handle ptrmask intrinsic
This one is slightly odd since it counts as an address expression,
which previously could never fail. Allow the existing TTI hook to
return the value to use, and re-use it for handling how to handle
ptrmask.
Handles the no-op addrspacecasts for AMDGPU. We could probably do
something better based on analysis of the mask value based on the
address space, but leave that for now.
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions