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| author | Craig Topper <craig.topper@sifive.com> | 2024-01-25 09:39:29 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2024-01-25 10:20:29 -0800 |
| commit | c92ad411f2f94d8521cd18abcb37285f9a390ecb (patch) | |
| tree | ab40b3da3c5fb1451630793d5c57b7e25a4942cf /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 849951f8759171cb6c74d3ccbcf154506fc1f0ae (diff) | |
| download | llvm-c92ad411f2f94d8521cd18abcb37285f9a390ecb.zip llvm-c92ad411f2f94d8521cd18abcb37285f9a390ecb.tar.gz llvm-c92ad411f2f94d8521cd18abcb37285f9a390ecb.tar.bz2 | |
Recommit "[RISCV] Support __riscv_v_fixed_vlen for vbool types. (#76551)"
Test updated to expect i8 gep.
Original message:
This adopts a similar behavior to AArch64 SVE, where bool vectors are
represented as a vector of chars with 1/8 the number of elements. This
ensures the vector always occupies a power of 2 number of bytes.
A consequence of this is that vbool64_t, vbool32_t, and vool16_t can
only be used with a vector length that guarantees at least 8 bits.
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions