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author | Craig Topper <craig.topper@intel.com> | 2018-12-13 19:08:10 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2018-12-13 19:08:10 +0000 |
commit | c6bfb05762d1b2458ca6b6916be437ed83e156d1 (patch) | |
tree | edace9dbee41f921a566e581ac73db363a805240 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
parent | 5f1706f3aa6ed5cd072700485f51bf0e54c5c5e6 (diff) | |
download | llvm-c6bfb05762d1b2458ca6b6916be437ed83e156d1.zip llvm-c6bfb05762d1b2458ca6b6916be437ed83e156d1.tar.gz llvm-c6bfb05762d1b2458ca6b6916be437ed83e156d1.tar.bz2 |
[CostModel][X86] Don't count 2 shuffles on the last level of a pairwise arithmetic or min/max reduction
This is split from D55452 with the correct patch this time.
Pairwise reductions require two shuffles on every level but the last. On the last level the two shuffles are <1, u, u, u...> and <0, u, u, u...>, but <0, u, u, u...> will be dropped by InstCombine/DAGCombine as being an identity shuffle.
Differential Revision: https://reviews.llvm.org/D55615
llvm-svn: 349072
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions