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| author | Daniel Kiss <daniel.kiss@arm.com> | 2020-06-15 15:02:38 +0200 |
|---|---|---|
| committer | Daniel Kiss <daniel.kiss@arm.com> | 2020-06-15 15:04:36 +0200 |
| commit | b8ae3fdfa579dbf366b1bb1cbfdbf8c51db7fa55 (patch) | |
| tree | 54b02e525494d0685c769b3d84eeb09fa4119f95 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 2d2c73c5cfdedf55f6e1a8ae7f59ee54e2d89c99 (diff) | |
| download | llvm-b8ae3fdfa579dbf366b1bb1cbfdbf8c51db7fa55.zip llvm-b8ae3fdfa579dbf366b1bb1cbfdbf8c51db7fa55.tar.gz llvm-b8ae3fdfa579dbf366b1bb1cbfdbf8c51db7fa55.tar.bz2 | |
[AArch64] Fix BTI instruction emission.
Summary:
SCTLR_EL1.BT[01] controls the PACI[AB]SP compatibility with PBYTE 11
(see [1])
This bit will be set to zero so PACI[AB]SP are equal to BTI C
instruction only.
[1] https://developer.arm.com/docs/ddi0595/b/aarch64-system-registers/sctlr_el1
Reviewers: chill, tamas.petz, pbarrio, ostannard
Reviewed By: tamas.petz, ostannard
Subscribers: kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D81746
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions