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| author | Alexandros Lamprineas <alexandros.lamprineas@arm.com> | 2024-10-23 16:28:55 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-10-23 16:28:55 +0100 |
| commit | a91ebcdd91cae429762bbed39f569a4016fbf2b1 (patch) | |
| tree | 9cc3ff1e7f07d21b2635da15309f1ef2f9c86676 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 82d2df2b4922a158b01ab00f3cac5f552bf0172d (diff) | |
| download | llvm-a91ebcdd91cae429762bbed39f569a4016fbf2b1.zip llvm-a91ebcdd91cae429762bbed39f569a4016fbf2b1.tar.gz llvm-a91ebcdd91cae429762bbed39f569a4016fbf2b1.tar.bz2 | |
[FMV][AArch64] Unify aes with pmull and sve2-aes with sve2-pmull128. (#111673)
According to the Arm Architecture Reference Manual for A-profile
architecture you can't have one feature without having the other:
ID_AA64ZFR0_EL1.AES, bits [7:4]
> FEAT_SVE_AES implements the functionality identified by the value
0b0001.
> FEAT_SVE_PMULL128 implements the functionality identified by the value
0b0010.
> The permitted values are 0b0000 and 0b0010.
(The following was removed from the latest release of the specification,
but it appears to be a mistake that was not intended to relax the
architecture constraints. The discrepancy has been reported)
ID_AA64ISAR0_EL1.AES, bits [7:4]
> FEAT_AES implements the functionality identified by the value 0b0001.
> FEAT_PMULL implements the functionality identified by the value
0b0010.
> From Armv8, the permitted values are 0b0000 and 0b0010.
Approved in ACLE as https://github.com/ARM-software/acle/pull/352
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
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