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author | Daniel Bertalan <dani@danielbertalan.dev> | 2022-06-17 17:21:59 +0200 |
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committer | Daniel Bertalan <dani@danielbertalan.dev> | 2022-06-30 06:28:42 +0200 |
commit | a3f67f0920eaa111637b3411209213f46de202d7 (patch) | |
tree | ba0dfd7f0ed974e2806156a15419417ee66befba /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
parent | fd6b9074ca02d1d7d1daa213ba9f6e91dec03c2d (diff) | |
download | llvm-a3f67f0920eaa111637b3411209213f46de202d7.zip llvm-a3f67f0920eaa111637b3411209213f46de202d7.tar.gz llvm-a3f67f0920eaa111637b3411209213f46de202d7.tar.bz2 |
[lld-macho] Initial support for Linker Optimization Hints
Linker optimization hints mark a sequence of instructions used for
synthesizing an address, like ADRP+ADD. If the referenced symbol ends up
close enough, it can be replaced by a faster sequence of instructions
like ADR+NOP.
This commit adds support for 2 of the 7 defined ARM64 optimization
hints:
- LOH_ARM64_ADRP_ADD, which transforms a pair of ADRP+ADD into ADR+NOP
if the referenced address is within +/- 1 MiB
- LOH_ARM64_ADRP_ADRP, which transforms two ADRP instructions into
ADR+NOP if they reference the same page
These two kinds already cover more than 50% of all LOHs in
chromium_framework.
Differential Review: https://reviews.llvm.org/D128093
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
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