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| author | Martin Storsjö <martin@martin.st> | 2023-08-18 15:23:44 +0300 |
|---|---|---|
| committer | Martin Storsjö <martin@martin.st> | 2023-08-21 14:08:23 +0300 |
| commit | 955d7615bd7563cc78a5106215daf9e6e47ffb5e (patch) | |
| tree | fd7de34a6a125919a9d2672cbddd966e517b4be1 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | dc60003ec8b2faf595b528a39f64b697a589da06 (diff) | |
| download | llvm-955d7615bd7563cc78a5106215daf9e6e47ffb5e.zip llvm-955d7615bd7563cc78a5106215daf9e6e47ffb5e.tar.gz llvm-955d7615bd7563cc78a5106215daf9e6e47ffb5e.tar.bz2 | |
[AArch64] [GlobalISel] Fix clobbered callee saved registers with win64 varargs
This fixes a regression since 1c10d5b175992a9d056a2d763a932e5652386fc1
/ https://reviews.llvm.org/D130903 by applying the same fix from
SelectionDAG from 8cb3667541a94c4fa11b06e19020f753414c1d03 /
https://reviews.llvm.org/D35720.
This could possibly have been detected if the existing testcases
in win64_vararg.ll had been tested with GlobalISel too, but all
the IR snippets there fail to be translated with GlobalISel.
This adds a separate testcase based on real world LLVM IR (instead of
hand-reduced IR), which GlobalISel does translate happily - tested
with both SelectionDAG and GlobalISel.
Before this change, the stack object locations (visible in MIR
with "llc -print-after-all") didn't match with what the prologue
emitted by AArch64FrameLowering actually looked like, which caused
clobbered callee saved registers when function local stack objects
aliased the actual location of the callee saved registers.
This fixes https://github.com/llvm/llvm-project/issues/64740.
Differential Revision: https://reviews.llvm.org/D158272
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions