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| author | Toma Tabacu <toma.tabacu@imgtec.com> | 2015-06-22 13:10:23 +0000 |
|---|---|---|
| committer | Toma Tabacu <toma.tabacu@imgtec.com> | 2015-06-22 13:10:23 +0000 |
| commit | 8e0316d4390f3ac92c1b593be49a734404102cbf (patch) | |
| tree | d86ab805dbc2579195d14b1dfdab14a445e9e924 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 55a997437c224dd7b0a239d2dbe52eaaf34e4760 (diff) | |
| download | llvm-8e0316d4390f3ac92c1b593be49a734404102cbf.zip llvm-8e0316d4390f3ac92c1b593be49a734404102cbf.tar.gz llvm-8e0316d4390f3ac92c1b593be49a734404102cbf.tar.bz2 | |
[mips] [IAS] Add support for LAReg with identical source and destination register operands.
Summary: In this case, we're supposed to load the immediate in AT and then ADDu it with the source register and put it in the destination register.
Reviewers: dsanders
Reviewed By: dsanders
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D9367
llvm-svn: 240278
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions