diff options
author | Ricardo Jesus <rjj@nvidia.com> | 2024-10-23 15:20:33 +0100 |
---|---|---|
committer | GitHub <noreply@github.com> | 2024-10-23 15:20:33 +0100 |
commit | 8a9921f5692ab33451d11454b40a023ca0965a69 (patch) | |
tree | 32bb9bcca5164158aea9577285913113f44dfc6c /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
parent | 294726d738c47cc9df41618862f235fd985642d7 (diff) | |
download | llvm-8a9921f5692ab33451d11454b40a023ca0965a69.zip llvm-8a9921f5692ab33451d11454b40a023ca0965a69.tar.gz llvm-8a9921f5692ab33451d11454b40a023ca0965a69.tar.bz2 |
[AArch64] Use INDEX for constant Neon step vectors (#113424)
When compiling for an SVE target we can use INDEX to generate constant
fixed-length step vectors, e.g.:
```
uint32x4_t foo() {
return (uint32x4_t){0, 1, 2, 3};
}
```
Currently:
```
foo():
adrp x8, .LCPI1_0
ldr q0, [x8, :lo12:.LCPI1_0]
ret
```
With INDEX:
```
foo():
index z0.s, #0, #1
ret
```
The logic for this was already in `LowerBUILD_VECTOR`, though it was
hidden under a check for `!Subtarget->isNeonAvailable()`. This patch
refactors this to enable the corresponding code path unconditionally for
constant step vectors (as long as we can use SVE for them).
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions