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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-07-02 14:40:22 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-07-02 14:40:22 +0000 |
| commit | 70a4d3f67ca9e7fa676a90e89470765d0b8246a7 (patch) | |
| tree | 0f59d6603c4e15c0c1895457e413e93635f84b2d /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | ed633992445823cd319bae171a42355455749467 (diff) | |
| download | llvm-70a4d3f67ca9e7fa676a90e89470765d0b8246a7.zip llvm-70a4d3f67ca9e7fa676a90e89470765d0b8246a7.tar.gz llvm-70a4d3f67ca9e7fa676a90e89470765d0b8246a7.tar.bz2 | |
AMDGPU/GlobalISel: Fix G_GEP with mixed SGPR/VGPR operands
The register bank for the destination of the sample argument copy was
wrong. We shouldn't be constraining each source to the result register
bank. Allow constraining the original register to the right size.
llvm-svn: 364928
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions