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author | Thomas Raoux <thomasraoux@google.com> | 2020-07-10 14:55:04 -0700 |
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committer | Thomas Raoux <thomasraoux@google.com> | 2020-07-10 14:55:04 -0700 |
commit | 6d5aeb0dceebd4c4d4ac9d9d78919362db28f081 (patch) | |
tree | c0ff383ef326f1ac21f7fb97f93e9ef32883fb98 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
parent | c0bc995429c417c1e206841d6b9727218fab3f73 (diff) | |
download | llvm-6d5aeb0dceebd4c4d4ac9d9d78919362db28f081.zip llvm-6d5aeb0dceebd4c4d4ac9d9d78919362db28f081.tar.gz llvm-6d5aeb0dceebd4c4d4ac9d9d78919362db28f081.tar.bz2 |
[mlir][linalg] Improve aliasing approximation for hoisting transfer read/write
Improve the logic deciding if it is safe to hoist vector transfer read/write
out of the loop. Change the logic to prevent hoisting operations if there are
any unknown access to the memref in the loop no matter where the operation is.
For other transfer read/write in the loop check if we can prove that they
access disjoint memory and ignore them in this case.
Differential Revision: https://reviews.llvm.org/D83538
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions