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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2021-05-25 17:31:30 +0100 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2021-05-25 17:31:45 +0100 |
| commit | 57250f2f3c6d03e27d8649f6f7d6bdbabf8936cc (patch) | |
| tree | 04ceb2565097f755b65c56ac212b244489e10c0f /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | def6269779aff0d4f1994cf73f7910add044ff72 (diff) | |
| download | llvm-57250f2f3c6d03e27d8649f6f7d6bdbabf8936cc.zip llvm-57250f2f3c6d03e27d8649f6f7d6bdbabf8936cc.tar.gz llvm-57250f2f3c6d03e27d8649f6f7d6bdbabf8936cc.tar.bz2 | |
[X86][Atom] Fix vector PSHUFB resource/throughputs
Match whats documented in the Intel AOM - the XMM variant of PSHUFB requires BOTH ports - this was being incorrectly modelled as EITHER port.
Now that we can use in-order models in llvm-mca, the atom model is a good "worst case scenario" analysis for x86.
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions