diff options
| author | Jay Foad <jay.foad@amd.com> | 2024-03-20 10:04:22 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-03-20 10:04:22 +0000 |
| commit | 56e32491526e21687ed1466a99ae39a9374e30b0 (patch) | |
| tree | c6d3eab4845d81bc6a94693db6734e12a47d690b /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 27534d69e275eeb6669296c038bf29d8a9b163e5 (diff) | |
| download | llvm-56e32491526e21687ed1466a99ae39a9374e30b0.zip llvm-56e32491526e21687ed1466a99ae39a9374e30b0.tar.gz llvm-56e32491526e21687ed1466a99ae39a9374e30b0.tar.bz2 | |
[AMDGPU] Simplify GFX11/GFX12 FLAT instruction definitions. NFC. (#85819)
- Give the tablegen record for the Real the same name as the tablegen
record for the pseudo. This removes all cases where the same
instruction name has to be mentioned more than once on the definition
line.
- Use multiclasses for all Real definitions, to allow suffixes to be
added bit by bit, e.g. first _SADDR and then _gfx11.
This is a similar approach to the one used in BUFInstructions.td.
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions