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| author | Jay Foad <jay.foad@amd.com> | 2020-05-01 16:43:12 +0100 |
|---|---|---|
| committer | Jay Foad <jay.foad@amd.com> | 2020-05-14 18:54:49 +0100 |
| commit | 42a556050346ffaa0fe3c0cc4dab24ad65a115a4 (patch) | |
| tree | 49c6f8b345b525cb1f19f73e3549cbeb0ee387fd /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 426afd79da70ec8c7f82164d007fe7045e5fe05e (diff) | |
| download | llvm-42a556050346ffaa0fe3c0cc4dab24ad65a115a4.zip llvm-42a556050346ffaa0fe3c0cc4dab24ad65a115a4.tar.gz llvm-42a556050346ffaa0fe3c0cc4dab24ad65a115a4.tar.bz2 | |
[AMDGPU] New SIInsertHardClauses pass
Enable clausing of memory loads on gfx10 by adding a new pass to insert
the s_clause instructions that mark the start of each hard clause.
Differential Revision: https://reviews.llvm.org/D79792
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions