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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-10-05 00:35:49 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-10-05 00:35:49 +0000 |
| commit | 3a541b046a1989cfbedc99a3ceadc00083422a4c (patch) | |
| tree | e2b2270f749550dd217a573322f4177397ae7eef /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 48c69106e4ce1759b6df61d5e6a59a22768944a8 (diff) | |
| download | llvm-3a541b046a1989cfbedc99a3ceadc00083422a4c.zip llvm-3a541b046a1989cfbedc99a3ceadc00083422a4c.tar.gz llvm-3a541b046a1989cfbedc99a3ceadc00083422a4c.tar.bz2 | |
Add TRI::getSubClassWithSubReg(RC, Idx) function.
This function is used to constrain a register class to a sub-class that
supports the given sub-register index.
For example, getSubClassWithSubReg(GR32, sub_8bit) -> GR32_ABCD.
The function will be used to compute register classes when emitting
INSERT_SUBREG and EXTRACT_SUBREG nodes and for register class inflation
of sub-register operations.
The version provided by TableGen is usually adequate, but targets can
override.
llvm-svn: 141142
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions