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authorOliver Stannard <oliver.stannard@arm.com>2025-02-13 09:09:29 +0000
committerGitHub <noreply@github.com>2025-02-13 09:09:29 +0000
commit308ce8d5240875911987b63fa6579c87758ab4ac (patch)
tree3b71bc223e4fe9ae341ecb6f89352ccd3f379f69 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp
parent298caebaadc38eadced7175c80ed6b2866755cb9 (diff)
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[ARM] Fix calling convention for __fp16 with big-endian (#126741)
AAPCS32 defines the fp16 and bf16 types as being passed as if they were extended to 32 bits, with the high 16 bits being unspecified. The extension is specified as happening as-if it was done in a register, which means that for big endian targets, the actual value gets passed in the higher addressed half of the stack slot, instead of the lower addressed half as for little endian. Previously, for targets with the fp16 extension, we were passing these types as a 16 bit stack slot, which worked for little endian because every later stack slot would be 4-byte aligned leaving the 2 byte gap, but was incorrect for big endian.
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
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