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| author | David Green <david.green@arm.com> | 2024-09-07 15:31:26 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-09-07 15:31:26 +0100 |
| commit | 307713aafc011844acdcb18ca6acbf3f2de29f5f (patch) | |
| tree | 01b3e3a4db7ca33dfaf80c19a502c4772ed8d9bc /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 3ba0755d3e50c62d27ac9c37a0250f525dcad28d (diff) | |
| download | llvm-307713aafc011844acdcb18ca6acbf3f2de29f5f.zip llvm-307713aafc011844acdcb18ca6acbf3f2de29f5f.tar.gz llvm-307713aafc011844acdcb18ca6acbf3f2de29f5f.tar.bz2 | |
[AArch64] Do not generate uitofp(ld4) where and/shift can be used. (#107538)
After #107201 and #107367 the codegen for zext(ld4) can use and / shift
to extract the lanes out of the original vectors elements. This avoids
the need for the expensive ld4 operations, so can lead to performance
improvements over using the interleaving loads and ushll.
This patch stops the generation of ld4 for uitofp(ld4) that would become
uitofp(zext(ld4)). It doesn't handle zext yet to make sure that widening
instructions like mull and addl are not adversely affected.
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions