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author | XinWang10 <xin10.wang@intel.com> | 2023-07-09 23:21:02 -0400 |
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committer | Wang, Xin10 <xin10.wang@intel.com> | 2023-07-14 03:42:42 -0400 |
commit | 2d6a5ab5ebd4907fe3bb2ee67574fd672ad80bd8 (patch) | |
tree | 22e09ef2da0750f105a27742e4aee69970224582 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
parent | 0d8109374248dac9aaeee2858cca3dd8d6ef3dbb (diff) | |
download | llvm-2d6a5ab5ebd4907fe3bb2ee67574fd672ad80bd8.zip llvm-2d6a5ab5ebd4907fe3bb2ee67574fd672ad80bd8.tar.gz llvm-2d6a5ab5ebd4907fe3bb2ee67574fd672ad80bd8.tar.bz2 |
[X86]Recommit D154193 - Remove TEST in AND32ri+TEST16rr in peephole-opt
Previously we remove a pattern like:
%reg = and32ri %in_reg, 5
... // EFLAGS not changed.
%src_reg = subreg_to_reg 0, %reg, %subreg.sub_index
test64rr %src_reg, %src_reg, implicit-def $eflags
We can remove test64rr since it has same functionality as and subreg_to_reg avoid the opt in previous code, so we handle this case specially.
And this case is also can be opted for the same reason, like:
%reg = and32ri %in_reg, 5
... // EFLAGS not changed.
%src_reg = copy %reg.sub_16bit:gr32
test16rr %src_reg, %src_reg, implicit-def $eflags
The COPY from gr32 to gr16 prevent the opt in previous code too, just handle it specially as what we did for test64rr.
Reviewed By: skan
Differential Revision: https://reviews.llvm.org/D154193
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions