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| author | Steffen Larsen <sholstla@amd.com> | 2026-01-21 17:18:33 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2026-01-21 17:18:33 +0100 |
| commit | 2708629c05a8dd4f024212920eb2e30fda18f8f5 (patch) | |
| tree | 536247154cb43f6c423bc0a10ecaab7d70eb3fd1 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 7cf30a7d3dca64b219a82a69bbd81beee41f514f (diff) | |
| download | llvm-2708629c05a8dd4f024212920eb2e30fda18f8f5.zip llvm-2708629c05a8dd4f024212920eb2e30fda18f8f5.tar.gz llvm-2708629c05a8dd4f024212920eb2e30fda18f8f5.tar.bz2 | |
[AMDGPU][SPIRV] Correctly lower huge device function arguments (#176921)
In the ABIInfo implementations for both the SPIRV and AMDGPU targets,
the lowering of arguments too large to fit into registers is currently
prone to integer overflows when determining the number of needed
registers for the arguments. This causes arguments so large that they
need more registers than an `unsigned` can represent to look like they
fit into the available registers. To avoid this, the function for
determining the required number of registers is changed to return a
64-bit unsigned integer value instead.
Note that the SPIR-V target currently trips the verifier due to a check
that arguments passed by value don't exceed the representable size. This
also affects other targets, such as x86 and is outside the scope of
these changes.
See https://github.com/llvm/llvm-project/issues/118207.
---------
Signed-off-by: Steffen Holst Larsen <HolstLarsen.Steffen@amd.com>
Co-authored-by: Steffen Holst Larsen <HolstLarsen.Steffen@amd.com>
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions
