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| author | Min-Yih Hsu <min@myhsu.dev> | 2023-12-26 16:29:02 -0800 |
|---|---|---|
| committer | Min-Yih Hsu <min@myhsu.dev> | 2023-12-26 20:55:23 -0800 |
| commit | 2476e2a91140b57ca3ad0792597be4f4d20ddb1a (patch) | |
| tree | b6b8bdbac5138128efe87d5f69f01cb80696c096 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | 6f85075ff7281be1802c9fd30758d34b67481a1e (diff) | |
| download | llvm-2476e2a91140b57ca3ad0792597be4f4d20ddb1a.zip llvm-2476e2a91140b57ca3ad0792597be4f4d20ddb1a.tar.gz llvm-2476e2a91140b57ca3ad0792597be4f4d20ddb1a.tar.bz2 | |
[M68k] Optimize for overflow arithmetics that will never overflow
We lower overflow arithmetics to its M68kISD counterparts that produce
results of {i16/i32, i8} in which the second resut represents CCR. In
the event where we're certain there won't be an overflow, for instance
8 & 16-bit multiplications, we simply use zero in replacement of the
second result.
This patch replaces M68kISD::CMOV that takes this kind of zero or
all-ones CCR as condition value with its corresponding operand value.
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions