diff options
| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2015-11-21 17:23:52 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2015-11-21 17:23:52 +0000 |
| commit | 220a9bc0188ca5c1377c8ffef8d794b78f610bb3 (patch) | |
| tree | e7756f39e5caf4d3192dadc0efd527c6f731c3c8 /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | a2a74f09fc9a0125e442dda65644a9c3484f2827 (diff) | |
| download | llvm-220a9bc0188ca5c1377c8ffef8d794b78f610bb3.zip llvm-220a9bc0188ca5c1377c8ffef8d794b78f610bb3.tar.gz llvm-220a9bc0188ca5c1377c8ffef8d794b78f610bb3.tar.bz2 | |
Hexagon V60/HVX DFA scheduler support
Extended DFA tablegen to:
- added "-debug-only dfa-emitter" support to llvm-tblgen
- defined CVI_PIPE* resources for the V60 vector coprocessor
- allow specification of multiple required resources
- supports ANDs of ORs
- e.g. [SLOT2, SLOT3], [CVI_MPY0, CVI_MPY1] means:
(SLOT2 OR SLOT3) AND (CVI_MPY0 OR CVI_MPY1)
- added support for combo resources
- allows specifying ORs of ANDs
- e.g. [CVI_XLSHF, CVI_MPY01] means:
(CVI_XLANE AND CVI_SHIFT) OR (CVI_MPY0 AND CVI_MPY1)
- increased DFA input size from 32-bit to 64-bit
- allows for a maximum of 4 AND'ed terms of 16 resources
- supported expressions now include:
expression => term [AND term] [AND term] [AND term]
term => resource [OR resource]*
resource => one_resource | combo_resource
combo_resource => (one_resource [AND one_resource]*)
Author: Dan Palermo <dpalermo@codeaurora.org>
kparzysz: Verified AMDGPU codegen to be unchanged on all llc
tests, except those dealing with instruction encodings.
llvm-svn: 253790
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions