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| author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2020-08-21 06:13:56 -0500 |
|---|---|---|
| committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2020-08-21 06:58:37 -0500 |
| commit | 519b0e3e9d6db21922d9a59c467d8b8709323a40 (patch) | |
| tree | 4d15c10bb1217c4eda71e9fa8e201c21687a0743 /llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp | |
| parent | 3f7985e6ec21c21eb6d6cdd05ab206d0bcf2a770 (diff) | |
| download | llvm-519b0e3e9d6db21922d9a59c467d8b8709323a40.zip llvm-519b0e3e9d6db21922d9a59c467d8b8709323a40.tar.gz llvm-519b0e3e9d6db21922d9a59c467d8b8709323a40.tar.bz2 | |
[PowerPC] Pre-commit FISel with PC-Rel test
Our handling of PC-Relative addressing is currently broken with
Fast ISel in 3 ways:
- FISel emits calls without handling all the PC-Rel intricacies
- FISel materializes FP constants through the TOC
- FISel materializes GV's through the TOC
As it would be unnecessarily tedious to implement all the handling
for PC-Rel in Fast ISel, we will turn off FISel for anything that
generates references to the TOC.
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp')
0 files changed, 0 insertions, 0 deletions