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authorYashas Andaluri <quic_yandalur@quicinc.com>2024-11-23 02:47:30 +0530
committerGitHub <noreply@github.com>2024-11-22 15:17:30 -0600
commit028d41d7cf16ffaba1493d850a382a6d3eb814cf (patch)
tree68dda7e71b51f7073e4aac5ae5909a555beea8af /llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
parent7523086a050d679370dfd86a0166d5f7168ffa09 (diff)
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[Hexagon] Add Hexagon Load Widening Pass (#116330)
Extend existing store widening pass to widen load instructions. This patch also borrows the alias check algorithm from AMDGPU's load store widening pass. Widened load instruction is inserted before the first candidate load instruction. Widened store instruction is inserted after the last candidate store instruction. This method helps avoid moving uses/defs when replacing load/store instructions with their widened equivalents. The pass has also been extended to * Generate 64-bit widened stores * Handle 32-bit post increment load/store * Handle stores of non-immediate values * Handle stores where the offset is a GlobalValue
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