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| author | Craig Topper <craig.topper@intel.com> | 2017-09-07 06:11:10 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-09-07 06:11:10 +0000 |
| commit | 7bc65e220c31066575e88a36f08463e1ccdfbd52 (patch) | |
| tree | 2f5d7fa9c7c2dd799be6cd2d46052e4efa1bb220 /llvm/lib/Bitcode/Reader/BitReader.cpp | |
| parent | cfad9d5f0fc20bdc7ee057d312791335ac028aef (diff) | |
| download | llvm-7bc65e220c31066575e88a36f08463e1ccdfbd52.zip llvm-7bc65e220c31066575e88a36f08463e1ccdfbd52.tar.gz llvm-7bc65e220c31066575e88a36f08463e1ccdfbd52.tar.bz2 | |
[X86] Force shuffle lowering to only create X86ISD::VPERM2X128 with 64-bit element types so we can remove some patterns from isel.
Intrinsic handling is still creating these nodes with 32-bit elements as well. But at least this gets rid of 8 and 16.
Ideally, someday we'll convert the intrinsics to generic vector shuffles and remove the intrinsics.
llvm-svn: 312702
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitReader.cpp')
0 files changed, 0 insertions, 0 deletions