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author | Craig Topper <craig.topper@intel.com> | 2020-07-29 10:05:25 -0700 |
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committer | Craig Topper <craig.topper@intel.com> | 2020-07-29 10:23:07 -0700 |
commit | 3efc978baede3ffb4616774e3d1c722fe4128ef5 (patch) | |
tree | 307d71f6637cd6567626c0f8f1a2643d17f25ab7 /llvm/lib/Analysis/VectorUtils.cpp | |
parent | 71d0a2b8a31344ab29d1afd0c54d89873fb3cc9e (diff) | |
download | llvm-3efc978baede3ffb4616774e3d1c722fe4128ef5.zip llvm-3efc978baede3ffb4616774e3d1c722fe4128ef5.tar.gz llvm-3efc978baede3ffb4616774e3d1c722fe4128ef5.tar.bz2 |
[LV] Add abs/smin/smax/umin/umax intrinsics to isTriviallyVectorizable
This patch adds support for vectorizing these intrinsics.
Differential Revision: https://reviews.llvm.org/D84796
Diffstat (limited to 'llvm/lib/Analysis/VectorUtils.cpp')
-rw-r--r-- | llvm/lib/Analysis/VectorUtils.cpp | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/llvm/lib/Analysis/VectorUtils.cpp b/llvm/lib/Analysis/VectorUtils.cpp index fbd5c80..cdcbd15 100644 --- a/llvm/lib/Analysis/VectorUtils.cpp +++ b/llvm/lib/Analysis/VectorUtils.cpp @@ -43,13 +43,18 @@ static cl::opt<unsigned> MaxInterleaveGroupFactor( /// hasVectorInstrinsicScalarOpd). bool llvm::isTriviallyVectorizable(Intrinsic::ID ID) { switch (ID) { - case Intrinsic::bswap: // Begin integer bit-manipulation. + case Intrinsic::abs: // Begin integer bit-manipulation. + case Intrinsic::bswap: case Intrinsic::bitreverse: case Intrinsic::ctpop: case Intrinsic::ctlz: case Intrinsic::cttz: case Intrinsic::fshl: case Intrinsic::fshr: + case Intrinsic::smax: + case Intrinsic::smin: + case Intrinsic::umax: + case Intrinsic::umin: case Intrinsic::sadd_sat: case Intrinsic::ssub_sat: case Intrinsic::uadd_sat: @@ -94,6 +99,7 @@ bool llvm::isTriviallyVectorizable(Intrinsic::ID ID) { bool llvm::hasVectorInstrinsicScalarOpd(Intrinsic::ID ID, unsigned ScalarOpdIdx) { switch (ID) { + case Intrinsic::abs: case Intrinsic::ctlz: case Intrinsic::cttz: case Intrinsic::powi: |