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| author | Cullen Rhodes <cullen.rhodes@arm.com> | 2020-03-24 17:03:59 +0000 |
|---|---|---|
| committer | Cullen Rhodes <cullen.rhodes@arm.com> | 2020-04-01 10:34:11 +0000 |
| commit | 84aa6cf1a9fe7c2d1c35b27ba6fbf1ee36a09a71 (patch) | |
| tree | c61fdde29e55b977053dc8a86c5b815d4b8d851d /llvm/lib/Analysis/ScalarEvolutionExpander.cpp | |
| parent | 918ccb64b02281355a6226fe8af07dc40e8ff9e3 (diff) | |
| download | llvm-84aa6cf1a9fe7c2d1c35b27ba6fbf1ee36a09a71.zip llvm-84aa6cf1a9fe7c2d1c35b27ba6fbf1ee36a09a71.tar.gz llvm-84aa6cf1a9fe7c2d1c35b27ba6fbf1ee36a09a71.tar.bz2 | |
[Transforms][SROA] Promote allocas with mem2reg for scalable types
Summary:
Aggregate types containing scalable vectors aren't supported and as far
as I can tell this pass is mostly concerned with optimisations on
aggregate types, so the majority of this pass isn't very useful for
scalable vectors.
This patch modifies SROA such that mem2reg is run on allocas with
scalable types that are promotable, but nothing else such as slicing is
done.
The use of TypeSize in this pass has also been updated to be explicitly
fixed size. When invoking the following methods in DataLayout:
* getTypeSizeInBits
* getTypeStoreSize
* getTypeStoreSizeInBits
* getTypeAllocSize
we now called getFixedSize on the resultant TypeSize. This is quite an
extensive change with around 50 calls to these functions, and also the
first change of this kind (being explicit about fixed vs scalable
size) as far as I'm aware, so feedback welcome.
A test is included containing IR with scalable vectors that this pass is
able to optimise.
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D76720
Diffstat (limited to 'llvm/lib/Analysis/ScalarEvolutionExpander.cpp')
0 files changed, 0 insertions, 0 deletions