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| author | Peter Smith <peter.smith@arm.com> | 2020-04-18 10:09:06 +0100 |
|---|---|---|
| committer | Peter Smith <peter.smith@arm.com> | 2020-04-23 15:46:44 +0100 |
| commit | f969c2aa657e28633ece63a5430e551f0b8beb98 (patch) | |
| tree | ff35f860598c5b297a51d93d949a760d5629025f /llvm/lib/Analysis/ModuleSummaryAnalysis.cpp | |
| parent | b0a1c0b72c9c61f8b0a223e08f43498abb64f5e8 (diff) | |
| download | llvm-f969c2aa657e28633ece63a5430e551f0b8beb98.zip llvm-f969c2aa657e28633ece63a5430e551f0b8beb98.tar.gz llvm-f969c2aa657e28633ece63a5430e551f0b8beb98.tar.bz2 | |
[LLD][ELF][ARM] Fix ARM Exidx order for non monotonic section order
The contents of the .ARM.exidx section must be ordered by SHF_LINK_ORDER
rules. We don't need to know the precise address for this order, but we
do need to know the relative order of sections. We have been using the
sectionIndex for this purpose, this works when the OutputSection order
has a monotonically increasing virtual address, but it is possible to
write a linker script with non-monotonically increasing virtual address.
For these cases we need to evaluate the base address of the OutputSection
so that we can order the .ARM.exidx sections properly.
This change moves the finalisation of .ARM.exidx till after the first
call to AssignAddresses. This permits us to sort on virtual address which
is linker script safe. It also permits a fix for part of pr44824 where
we generate .ARM.exidx section for the vector table when that table is so
far away it is out of range of the .ARM.exidx section. This fix will come
in a follow up patch.
Differential Revision: https://reviews.llvm.org/D78422
Diffstat (limited to 'llvm/lib/Analysis/ModuleSummaryAnalysis.cpp')
0 files changed, 0 insertions, 0 deletions