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author | Benjamin Maxwell <benjamin.maxwell@arm.com> | 2023-12-06 14:31:05 +0000 |
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committer | GitHub <noreply@github.com> | 2023-12-06 14:31:05 +0000 |
commit | b0b69fd879a03f3d37b8cd78049d27939de23ce2 (patch) | |
tree | 23cbfb69f399f5675008c655a448fdb9aeeb23a8 /llvm/lib/Analysis/ModuleSummaryAnalysis.cpp | |
parent | c4a77bfb62b7caeb8a4d73a09df7e18e438b890f (diff) | |
download | llvm-b0b69fd879a03f3d37b8cd78049d27939de23ce2.zip llvm-b0b69fd879a03f3d37b8cd78049d27939de23ce2.tar.gz llvm-b0b69fd879a03f3d37b8cd78049d27939de23ce2.tar.bz2 |
[mlir][ArmSME] More precisely model dataflow in ArmSME to SCF lowerings (#73922)
Since #73253, loops over tiles in SSA form (i.e. loops that take
`iter_args` and yield a new tile) are supported, so this patch updates
ArmSME lowerings to this form. This is a NFC, as it still lowers to the
same intrinsics, but this makes IR less 'surprising' at a higher-level,
and may be recognised by more transforms.
Example:
IR before:
```mlir
scf.for %tile_slice_index = %c0 to %num_tile_slices step %c1
{
arm_sme.move_vector_to_tile_slice
%broadcast_to_1d, %tile, %tile_slice_index :
vector<[4]xi32> into vector<[4]x[4]xi32>
}
// ... later use %tile
```
IR now:
```mlir
%broadcast_to_tile = scf.for %tile_slice_index = %c0 to %num_tile_slices
step %c1 iter_args(%iter_tile = %init_tile) -> (vector<[4]x[4]xi32>)
{
%tile_update = arm_sme.move_vector_to_tile_slice
%broadcast_to_1d, %iter_tile, %tile_slice_index :
vector<[4]xi32> into vector<[4]x[4]xi32>
scf.yield %tile_update : vector<[4]x[4]xi32>
}
// ... later use %broadcast_to_tile
```
Diffstat (limited to 'llvm/lib/Analysis/ModuleSummaryAnalysis.cpp')
0 files changed, 0 insertions, 0 deletions