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| author | Paul Walker <paul.walker@arm.com> | 2025-10-22 12:22:49 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-10-22 12:22:49 +0100 |
| commit | a4dbd111c285012d744fa0f86e710e4b3032d826 (patch) | |
| tree | f6a5e7a19e33b8475cf46eda6030de4c0842a1f3 /llvm/lib/Analysis/ModuleSummaryAnalysis.cpp | |
| parent | 8b2aba2e20c3cfb9d2e9337fdc38c889b0ff8ae2 (diff) | |
| download | llvm-a4dbd111c285012d744fa0f86e710e4b3032d826.zip llvm-a4dbd111c285012d744fa0f86e710e4b3032d826.tar.gz llvm-a4dbd111c285012d744fa0f86e710e4b3032d826.tar.bz2 | |
[LLVM][CodeGen][AArch64] Fix global-isel for LD1R. (#164418)
LD1Rv8b only supports a base register but the DAG is matched using
am_indexed8 with the offset it finds silently dropped.
I've also fixed a couple of immediate operands types inconsistencies
that don't manifest as bugs because their incorrect scaling is overriden
by the complex pattern and MachineInstr that are correct and thus
there's nothing to test.
Diffstat (limited to 'llvm/lib/Analysis/ModuleSummaryAnalysis.cpp')
0 files changed, 0 insertions, 0 deletions