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| author | Nick Desaulniers <ndesaulniers@google.com> | 2023-02-16 17:47:37 -0800 |
|---|---|---|
| committer | Nick Desaulniers <ndesaulniers@google.com> | 2023-02-16 17:58:34 -0800 |
| commit | 5cc1016a57b38595262026ba3c482f6108b12e5b (patch) | |
| tree | 38d88d841f4f32adfa3b5d02ed3c901691311e0c /llvm/lib/Analysis/ModuleSummaryAnalysis.cpp | |
| parent | 28d45c843cd07514c9a7260d285ff59e14280ecf (diff) | |
| download | llvm-5cc1016a57b38595262026ba3c482f6108b12e5b.zip llvm-5cc1016a57b38595262026ba3c482f6108b12e5b.tar.gz llvm-5cc1016a57b38595262026ba3c482f6108b12e5b.tar.bz2 | |
[llvm][SelectionDAGBuilder] codegen callbr.landingpad intrinsic
Given a CallBrInst, retain its first virtual register in SelectionDagBuilder's
FunctionLoweringInfo if there's corresponding landingpad. Walk the list
of COPY MachineInstr to find the original virtual and physical registers
defined by the INLINEASM_BR MachineInst.
Test cases from https://reviews.llvm.org/D139565.
Link: https://github.com/llvm/llvm-project/issues/59538
Part 3 from
https://discourse.llvm.org/t/rfc-syncing-asm-goto-with-outputs-with-gcc/65453/8
Follow up patches still need to wire up CallBrPrepare into the pass
pipelines.
Reviewed By: efriedma, void
Differential Revision: https://reviews.llvm.org/D140160
Diffstat (limited to 'llvm/lib/Analysis/ModuleSummaryAnalysis.cpp')
0 files changed, 0 insertions, 0 deletions