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| author | Craig Topper <craig.topper@sifive.com> | 2023-02-23 09:47:42 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2023-02-23 09:47:42 -0800 |
| commit | 230e61658b5e5c91f631459511f0efb4b15f8c77 (patch) | |
| tree | 1f513ce81900c8c3c83b2d43ddccab649d0392e1 /llvm/lib/Analysis/ModuleSummaryAnalysis.cpp | |
| parent | 1b72a32762436aad1b7064a8d44681300fd8e380 (diff) | |
| download | llvm-230e61658b5e5c91f631459511f0efb4b15f8c77.zip llvm-230e61658b5e5c91f631459511f0efb4b15f8c77.tar.gz llvm-230e61658b5e5c91f631459511f0efb4b15f8c77.tar.bz2 | |
[LegalizeTypes] Add a special case for (add X, 1) to ExpandIntRes_ADDSUB.
On targets without ADDCARRY or ADDE, we need to emit a separate
SETCC to determine carry from the low half to the high half. Usually
we do (setult Lo, LHSLo). If RHSLo is 1 we can instead do (seteq Lo, 0).
This can reduce the live range of LHSLo.
Diffstat (limited to 'llvm/lib/Analysis/ModuleSummaryAnalysis.cpp')
0 files changed, 0 insertions, 0 deletions