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authorCraig Topper <craig.topper@sifive.com>2021-05-26 09:31:01 -0700
committerCraig Topper <craig.topper@sifive.com>2021-05-26 09:56:20 -0700
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parenta45877eea8c424cd91bc1f7749313c9cb3aab285 (diff)
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[RISCV] Don't propagate VL/VTYPE across inline assembly in the Insert VSETVLI pass.
It's conceivable someone could put a vsetvli in inline assembly so its safer to consider them as barriers. The alternative would be to trust that the user marks VL and VTYPE registers as clobbers of the inline assembly if they do that, but hat seems error prone. I'm assuming inline assembly in vector code is going to be rare. Reviewed By: frasercrmck, HsiangKai Differential Revision: https://reviews.llvm.org/D103126
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