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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2025-10-07 08:48:45 +0900 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-10-07 08:48:45 +0900 |
| commit | 476a6ea9575f1a8498e080b4ace0700c3b91f9c1 (patch) | |
| tree | 88968288b7afe421ddf434a73dd7c0ae495ab021 /llvm/examples/OptSubcommand/llvm-hello-sub.cpp | |
| parent | 709980e6d8c9da5bf0320bdf2cf5c0be8ae6fe5d (diff) | |
| download | llvm-476a6ea9575f1a8498e080b4ace0700c3b91f9c1.zip llvm-476a6ea9575f1a8498e080b4ace0700c3b91f9c1.tar.gz llvm-476a6ea9575f1a8498e080b4ace0700c3b91f9c1.tar.bz2 | |
AMDGPU: Track minNumAGPRs in MFI instead of mayUseAGPRs (#161996)
Fix mfma agpr allocation failures with -O0. Previously we were getting
lucky
on cases that can use AV registers with the normal optimization
pipeline.
This logic needs to be consistent with getMaxNumVectorRegs,
as that is what getReservedRegs to determine the AGPR budget. In the
future we should directly check the minimum AGPR budget, and individual
selection patterns need to know the minimum budget required for them.
Start accounting for the number of AGPRs required to perform the
allocation. Refine the selection predicates to check this number is
available, and default to selecting the VGPR case if there aren't
enough. This also avoids register allocation failures for the largest
MFMAs with the default register budget.
Diffstat (limited to 'llvm/examples/OptSubcommand/llvm-hello-sub.cpp')
0 files changed, 0 insertions, 0 deletions