aboutsummaryrefslogtreecommitdiff
path: root/llvm/examples/LLJITExamples/LLJITWithObjectCache/LLJITWithObjectCache.cpp
diff options
context:
space:
mode:
authorcdevadas <cdevadas@amd.com>2020-01-22 13:07:55 +0900
committerCarl Ritson <carl.ritson@amd.com>2020-01-22 13:18:32 +0900
commite53a9d96e6a074aa7f81ec104eb18e82997c7206 (patch)
treeb7fb028c6be4e30e3c722ae3569b6214addb855f /llvm/examples/LLJITExamples/LLJITWithObjectCache/LLJITWithObjectCache.cpp
parente0a6093a744d16c90eafa62d7143ce41806b2466 (diff)
downloadllvm-e53a9d96e6a074aa7f81ec104eb18e82997c7206.zip
llvm-e53a9d96e6a074aa7f81ec104eb18e82997c7206.tar.gz
llvm-e53a9d96e6a074aa7f81ec104eb18e82997c7206.tar.bz2
Resubmit: [AMDGPU] Invert the handling of skip insertion.
The current implementation of skip insertion (SIInsertSkip) makes it a mandatory pass required for correctness. Initially, the idea was to have an optional pass. This patch inserts the s_cbranch_execz upfront during SILowerControlFlow to skip over the sections of code when no lanes are active. Later, SIRemoveShortExecBranches removes the skips for short branches, unless there is a sideeffect and the skip branch is really necessary. This new pass will replace the handling of skip insertion in the existing SIInsertSkip Pass. Differential revision: https://reviews.llvm.org/D68092
Diffstat (limited to 'llvm/examples/LLJITExamples/LLJITWithObjectCache/LLJITWithObjectCache.cpp')
0 files changed, 0 insertions, 0 deletions