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| author | Fangrui Song <i@maskray.me> | 2021-05-05 00:20:41 -0700 |
|---|---|---|
| committer | Fangrui Song <i@maskray.me> | 2021-05-05 00:20:41 -0700 |
| commit | e510860656bb81bd90ae3cf8bb5ef4dc8cd33c18 (patch) | |
| tree | 7ae5c6ad6166652f95824af76c1e4c3b87ad6d5b /llvm/docs/CommandGuide/llvm-objdump.rst | |
| parent | cab3c6c6c48ed0da0f047bdc1a337d991c78ad8c (diff) | |
| download | llvm-e510860656bb81bd90ae3cf8bb5ef4dc8cd33c18.zip llvm-e510860656bb81bd90ae3cf8bb5ef4dc8cd33c18.tar.gz llvm-e510860656bb81bd90ae3cf8bb5ef4dc8cd33c18.tar.bz2 | |
[llvm-objdump] Add -M {att,intel} & deprecate --x86-asm-syntax={att,intel}
The internal `cl::opt` option --x86-asm-syntax sets the AsmParser and AsmWriter
dialect. The option is used by llc and llvm-mc tests to set the AsmWriter dialect.
This patch adds -M {att,intel} as GNU objdump compatible aliases (PR43413).
Note: the dialect is initialized when the MCAsmInfo is constructed.
`MCInstPrinter::applyTargetSpecificCLOption` is called too late and its MCAsmInfo
reference is const, so changing the `cl::opt` in
`MCInstPrinter::applyTargetSpecificCLOption` is not an option, at least without
large amount of refactoring.
Reviewed By: hoy, jhenderson, thakis
Differential Revision: https://reviews.llvm.org/D101695
Diffstat (limited to 'llvm/docs/CommandGuide/llvm-objdump.rst')
| -rw-r--r-- | llvm/docs/CommandGuide/llvm-objdump.rst | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/llvm/docs/CommandGuide/llvm-objdump.rst b/llvm/docs/CommandGuide/llvm-objdump.rst index cb2e452..4f6a633 100644 --- a/llvm/docs/CommandGuide/llvm-objdump.rst +++ b/llvm/docs/CommandGuide/llvm-objdump.rst @@ -146,8 +146,14 @@ OPTIONS .. option:: -M, --disassembler-options=<opt1[,opt2,...]> - Pass target-specific disassembler options. Currently supported for ARM targets - only. Available options are ``reg-names-std`` and ``reg-names-raw``. + Pass target-specific disassembler options. Available options: + + * ``reg-names-std``: ARM only (default). Print in ARM 's instruction set documentation, with r13/r14/r15 replaced by sp/lr/pc. + * ``reg-names-raw``: ARM only. Use r followed by the register number. + * ``no-aliases``: RISC-V only. Print raw instruction mnemonic instead of pesudo instruction mnemonic. + * ``numeric``: RISC-V only. Print raw register names instead of ABI mnemonic. (e.g. print x1 instead of ra) + * ``att``: x86 only (default). Print in the AT&T syntax. + * ``intel``: x86 only. Print in the intel syntax. .. option:: --mcpu=<cpu-name> @@ -242,6 +248,7 @@ OPTIONS .. option:: --x86-asm-syntax=<style> + Deprecated. When used with :option:`--disassemble`, choose style of code to emit from X86 backend. Supported values are: |