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| author | Momchil Velikov <momchil.velikov@arm.com> | 2024-12-06 17:50:20 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-12-06 17:50:20 +0000 |
| commit | 7f4414b2a1a4d9f802a03f56894c406f0fe3e9a9 (patch) | |
| tree | d2ce4522a145f597c4ddb762a5a8d435c5915494 /lldb/test/Shell/ScriptInterpreter/Python/bytecode.test | |
| parent | 39451e45f5905b5b3f8f6b6eb1d71005e6bcdd6a (diff) | |
| download | llvm-7f4414b2a1a4d9f802a03f56894c406f0fe3e9a9.zip llvm-7f4414b2a1a4d9f802a03f56894c406f0fe3e9a9.tar.gz llvm-7f4414b2a1a4d9f802a03f56894c406f0fe3e9a9.tar.bz2 | |
[AArch64] Generate zeroing forms of certain SVE2.2 instructions (4/11) (#116830)
SVE2.2 introduces instructions with predicated forms with zeroing of
the inactive lanes. This allows in some cases to save a `movprfx` or
a `mov` instruction when emitting code for `_x` or `_z` variants of
intrinsics.
This patch adds support for emitting the zeroing forms of certain
`FCVTZS`, and `FCVTZU` instructions.
Diffstat (limited to 'lldb/test/Shell/ScriptInterpreter/Python/bytecode.test')
0 files changed, 0 insertions, 0 deletions