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| author | Simon Cook <simon.cook@embecosm.com> | 2023-07-14 18:21:08 +0100 |
|---|---|---|
| committer | Simon Cook <simon.cook@embecosm.com> | 2023-07-14 18:21:08 +0100 |
| commit | 4083ecfd7f5e13f7906c9d2deafeb6e20ce95b16 (patch) | |
| tree | 90f0028d336304777d36a2fc7a97850470ffe04a /lldb/test/API/python_api | |
| parent | 0d3eee33f262402562a1ff28106dbb2f59031bdb (diff) | |
| download | llvm-4083ecfd7f5e13f7906c9d2deafeb6e20ce95b16.zip llvm-4083ecfd7f5e13f7906c9d2deafeb6e20ce95b16.tar.gz llvm-4083ecfd7f5e13f7906c9d2deafeb6e20ce95b16.tar.bz2 | |
[RISCV] Cleanups in CORE-V (xcv) extensions
This is a mostly NFC change cleaning up and clarifying components of the
in-tree CORE-V (xcv*) extensions following discussions on the remaining
extensions.
This makes the following changes to the xcbitmanip and xcvmac support:
1. Add missing extensions from RISCVISAInfo, such that they can be
supported in clang's -march option.
2. Clarify the extension version number is 1.0.0 in documentation.
3. Clarify the extensions are by OpenHW Group, and the capitilization
of the CORE-V extension family.
4. Add CORE-V to extension name in RISCVFeatures, both to be consistent
with other vendors, and also better distinguish e.g. CORE-V bit
manipulation vs RISC-V's standard Zb extensions.
Differential Revision: https://reviews.llvm.org/D155283
Diffstat (limited to 'lldb/test/API/python_api')
0 files changed, 0 insertions, 0 deletions
