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authorTed Woodward <tedwood@quicinc.com>2020-07-30 13:37:43 -0500
committerTed Woodward <tedwood@quicinc.com>2020-08-05 12:05:42 -0500
commit3169d920ccd16ec3c3e1bf5d91595b70a5278045 (patch)
treef55ebc6485c9b83edcbc7900d374c3e3dbe42125 /lldb/source/Target/ThreadPlanStepRange.cpp
parent3a3c9519e272e664172a0a90e8abf84b6d400106 (diff)
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Remove special Hexagon packet traversal code
On Hexagon, breakpoints need to be on the first instruction of a packet. When the LLVM disassembler for Hexagon returned 32 bit instructions, we needed code to find the start of the current packet. Now that the LLVM disassembler for Hexagon returns packets instead of instructions, we always have the first instruction of the packet. Remove the packet traversal code because it can cause problems when the next packet has more than one instruction. Reviewed By: clayborg Differential Revision: https://reviews.llvm.org/D84966
Diffstat (limited to 'lldb/source/Target/ThreadPlanStepRange.cpp')
-rw-r--r--lldb/source/Target/ThreadPlanStepRange.cpp8
1 files changed, 2 insertions, 6 deletions
diff --git a/lldb/source/Target/ThreadPlanStepRange.cpp b/lldb/source/Target/ThreadPlanStepRange.cpp
index f4b2ee3..3c42cd7 100644
--- a/lldb/source/Target/ThreadPlanStepRange.cpp
+++ b/lldb/source/Target/ThreadPlanStepRange.cpp
@@ -327,13 +327,9 @@ bool ThreadPlanStepRange::SetNextBranchBreakpoint() {
if (instructions == nullptr)
return false;
else {
- Target &target = GetThread().GetProcess()->GetTarget();
const bool ignore_calls = GetKind() == eKindStepOverRange;
- uint32_t branch_index =
- instructions->GetIndexOfNextBranchInstruction(pc_index, target,
- ignore_calls,
- &m_found_calls);
-
+ uint32_t branch_index = instructions->GetIndexOfNextBranchInstruction(
+ pc_index, ignore_calls, &m_found_calls);
Address run_to_address;
// If we didn't find a branch, run to the end of the range.